Progress on the 7-segment display driver has stalled a little.
VHDL is proving to be a very different experience for me coming from a software engineering background. Not only am I learning VHDL ‘the language’ but intricately tied to that is that what I’m actually doing is hardware design.
So I’ve been reading up on stuff like RTL and trying to wrap my head around the fact that I’m not writing a piece of software but am in fact designing hardware using a methodology that I’m only just starting to scratch the surface of.
(it’s also not helping that I’m getting distracted setting up my electronics workbench, but I digress….)
So now I’m working my way through the awesome book ‘VHDL for Logic Synthesis’; search it out on Amazon (need to figure out how to get a short link to it and I’ll upadte / put it in the next post). It really seems like the kind of concise overview that I’ve been looking for. I atleast now understand the design workflow much better and am getting more familiar with VHDL’s types. So that 7-segment display should be rocking in no time.
I’ve also picked up ‘Circuit Design and Simulation with VHDL, second edition’; it was actually the one I picked up first but the other VHDL book seemed highly recommended and more specific to exactly what I want to dig into right now.
Looking forward to going through the Circuit Design book’s examples once I get the 7-seg out of the way.
There is a big plan for this. More details on that soon :)